By THORN EMI Television Rentals Group Technical Training Department (auth.)
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Extra resources for An Introduction to Digital Techniques: Logic gates, Flip-flops, Counters and Shift registers
The FLIP-FLOP, therefore, is neither Set nor Reset and so stays in the Reset State with Q 'low'. 0). Gate (g1) has a 'low' from J and a 'low' from Q. Its output is 'low'. Gate (g2) has a 'high' from K and a 'high' from Q. Its output is 'high'. Gate (g2) output going 'high' will Reset the FLIP-FLOP making Q go 'low' on the trailing edge of the clock pulse. E). Gate (g1) has a 'high' output. Gate (g2) has a 'low' output. This will set the Q output 'high'. F). Gates (g1) and (g2) both have a 'low' output and so the FLIP-FLOP stays in the Set state.
Input Outputs A B L L L H H H Input Outputs D A B L L L L H L H L H L H L H H H H H A B L C X _ _ _ gate C E X _ _ _ _ gate Outputs C D E X _ _ _ _ gate High A c A DI~ _ _~ B B 29 USING Fig. 75 Exercise 5. NOR GATES. Fig. 76 Exercise 6. It is also possible to make up all gates using 'NOR' packages. Complete the truth tables for the following combinations and work out the type of gate they could replace. Inputs A 8 L Outputs Inputs X A 8 L L L L H L H H L H L H H H H C D _ _ gate Outputs C D X ___ gate A c x D----B 30 x Fig.
The J input terminal if taken 'high' with K 'low', sets the Q output 'high' on the negative going edge of the clock pulse. The K input terminal if taken 'high' with J 'low', resets the output 'low' on the negative going edge of the clock pulse. If both J and K are 'low' the FLIP-FLOP is neither Set nor Reset and remains unchanged. If both J and K are 'high', the FLIP-FLOP toggles on the negative going edge of each clock puIse. _ ·CK Q J K L L L H L H H L H L H H Q Q Q No change CIRCUIT OPERATION.
An Introduction to Digital Techniques: Logic gates, Flip-flops, Counters and Shift registers by THORN EMI Television Rentals Group Technical Training Department (auth.)